In the prior art, various devices have been described for the purpose of protecting a node of a semiconductor circuit when overvoltages are present at a signal input terminal. Such overvoltages are ordinarily caused by uncontrollable electrostatic characters which can be of either positive or negative polarity. Typically, the node to be protected is a gate electrode of an input MOS transistor in a logic circuit. For example, in U.S. Pat. No. 3,819,952 issued to Enomoto et al. on June 25, 1974, various protection devices were described which operate by presenting a very low impedance (short circuit) from the input node to a "substrate ground" (V.sub.SS) terminal whenever an overvoltage of "one" polarity is present at the signal input terminal. By of "one" polarity is meant of the same polarity as that of a logic "1," which is of negative polarity in P-MOS technology. As used in this context, "ground" means a wide area ohmic electrode contact to the opposed major surface of the body. On the other hand, in the prior art, an overvoltage of the other ("opposite") polarity at the signal input terminal is easily handled by a unidirectional current inhibiting diode connected between the signal input terminal and the bulk of the semiconductor body ("substrate"). Such a diode is conveniently furnished by an elongated semiconductor surface region whose extremities are connected between the signal input terminal and the node to be protected, such a region being of opposite conductivity type from that of the semiconductor bulk.
In many semiconductor integrated circuits, particularly those comprising a multiplicity of logic circuits integrated in the same semiconductor body at a major surface thereof, each such logic circuit has its own individual input node for which protection against overvoltages is required. Although each such node can again easily be protected against overvoltages of the "opposite" polarity by means of a separate diode formed by a separate surface impurity region, and although each such node could be further protected against overvoltages of the "one" polarity by means of a separate protection device which, in response to such overvoltages, provides a high conductivity electrical path from each node to substrate ground, that is, to the wide area electrode contact on the opposite major surface of the body; nevertheless, each such protection device itself would require an undue amount of semiconductor area. Moreover, such a protection arrangement would not protect the nodes against overvoltages of the "one" polarity when the semiconductor body containing the semiconductor circuits itself (including the protection device) is not "plugged in"; i.e., when the terminals V.sub.SS and V.sub.DD are electrically floating. Thus, protection would not be afforded when the drain V.sub.DD terminal is not connected to any external reference voltage source, simply because then the V.sub.DD line is floating and can assume any potential, no matter how high. Thus, at times when the terminals of the semiconductor circuits are electrically floating, the input nodes would not be protected against overvoltages of the "one" polarity.